1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device. More specifically, the present invention relates to such a fabrication method which includes forming a conductive film over an insulator having a recess and then selectively removing only a portion of the conductive film which lies on the insulator.
2. Description of the Related Art
As a semiconductor storage device, a DRAM of the type having a structure comprising a single transistor and a single capacitor has been widely used. With growing integration density of semiconductor devices including the DRAM, the DRAM has been decreasing in memory cell size. In order for the DRAM to operate stably, a capacitor of the DRAM needs to have a certain level of capacitance or higher. For this reason, a capacitor having a three-dimensional structure has been developed. Among such three-dimensional capacitor structures, there is a cylindrical capacitor structure.
The lower electrode of such a cylindrical capacitor is formed according to the following method.
(a) A memory cell transistor, a bit line contact, a bit line and a capacitor contact plug are formed on a semiconductor substrate. A capacitor oxide film for forming the capacitor is formed to a thickness of 1 to 3 μm over the resulting structure.
(b) A capacitor hole is formed through the capacitor oxide film by using the techniques of lithography and dry etching so as to expose an upper portion of the capacitor contact plug.
(c) A conductive film which will form the lower electrode serving as a storage electrode is formed so as to cover the interior of the capacitor hole and a surface of a capacitor interlayer insulating film.
(d) A portion of the conductive film which lies on the interlayer insulating film is removed, while the other portion of the conductive film which lies on a sidewall and bottom portion of the hole is allowed to remain.
Two methods including a method using CMP and a method using dry etching are applicable to the process step (d). As compared with CMP, the dry etching technique has been conventionally used and hence has the advantages of being capable of utilizing existing equipment and requiring a low fabrication cost and other advantages. For this reason, desires to use dry etching exist.
In a process using dry etching, a protective insulating film is formed in the capacitor hole before dry etching for removing the portion of the conductive film which lies on the interlayer insulating film in order to prevent the bottom of the hole from being etched. This is because connection to the contact plug formed under the hole cannot be made if the bottom of the hole is etched.
Japanese Patent Laid-Open No. 2006-140405 describes a technique related to a cylindrical capacitor using a metal electrode such as of TiN as its lower electrode for the purpose of improving the capacitor performance.
Paragraph [0098] of Japanese Patent Laid-Open No. 2006-140405 discloses a technique such that when a deep hole having an aspect ratio of not less than 7 is formed in an insulating film, removal of titanium nitride exposed on the interlayer insulating film can be achieved while allowing titanium nitride to remain in the bottom of the deep hole without the need to fill the deep hole with an insulating film.
Usually, chlorine (Cl2) is used for etching of TIN. This is because the use of chlorine (Cl2) ensures adequate etching rate and selective ratio. BCl3, on the other hand, exhibits a low etching rate and hence is usually not suitable for volume production. For this reason, BCl3 is hardly used alone as an etching gas for TN, and it has been a common practice to use BCl3 either as an additive to be added to a main etching gas e.g., chlorine (Cl2) for the purpose of removing oxides and the like produced during etching or in cleaning the surface of the underlying film after the removal of TiN.
FIGS. 6A to 6D are sectional views illustrating an etching process using chlorine (Cl2) for etching titanium nitride deposited over a surface of an insulating film formed with a deep hole having an aspect ratio of not less than 7 without filling the deep hole with an insulating film. Interlayer insulating film 31 is formed over capacitor contact plug 21. A hole having a small opening diameter (of not more than 300 nm for example) is formed to extend through interlayer insulating film 31. Subsequently, titanium nitride film 41 is formed non-selectively. When etching is performed without protecting the opening defined by titanium nitride film 41 with a protective film, etching ions (i.e., chlorine ions) 51 fail to reach the bottom of the deep hole because of the micro-loading effect, thereby allowing a portion of titanium nitride film 41 which lies in the bottom of the hole to remain. However, since the reactivity of chorine ions is high, restriction on etching of a portion of titanium nitride film 41 which lies at the sidewall surface of the deep hole is insufficient. That is, the etching rate increases as the hole extends closer to its opening top. Therefore, a problem exists that the portion of the titanium nitride which lies at the sidewall surface of the deep hole adjacent to the opening top is undesirably removed by etching as illustrated in FIGS. 6A to 6D. This is because as the removal of the portion of the conductive film which lies on the interlayer insulating film by etching proceeds, the consumption of the etching gas at the surface of the interlayer insulating film decreases, whereas the etching rate of the portion of the conductive film which lies at the sidewall portion of the recess increases by supply of fresh etching gas. That is, there arises a problem that when chlorine (Cl2) is used in the formation of the lower electrode of a DRAM capacitor, the lower electrode has a lowered capacitance that is lower than a designed value though the design ensures a sufficient capacitance.